N-Minus Resistance Control for 6" GaAs MESFET Manufacturing

Yong Cheong and James Morris
Anadigics, Inc.

The scale-up from 4" to 6" wafer size presents significant advantages to the GaAs IC manufacturer. This scale-up brings with it several challenges however including maintaining good process control and good process uniformity. As wafer size is increased, minimizing the variation in key parameters such as N-minus resistance becomes increasingly important since increased variation may result in increased yield loss. In this work variation of N-minus resistance associated with variations in the Ion Implant and Rapid Thermal Anneal (RTA) processes was investigated. Process monitors for these processes were used to detect changes in implant dose and activation temperature. The cause of any observed changes in the unit processes was investigated and action taken to restore affected process. It was determined that a significant fraction of the observed variation in N-minus resistance was caused by (previously undetected) changes in activation temperature. A process control scheme based on the RTA process monitor has enabled us to reduce the total variation of N-minus resistance by as much as 50%.