A High Performance and High Yield Self-Aligned and Double Recessed pHEMT Process with One Lithography Step for Both Gate and First Recess Definition

Kamal Tabatabaie-Alavi, Colin Whelan, and Elsa Tong

Raytheon RF Components Company

362 Lowell Street, Andover, Massachusetts, 01810, USA

Phone: 978.684.8598, e-mail: Kamal_Alavi@RRFC.Raytheon.com

 

Keywords: Self-aligned, pHEMT, Double Recessed

 

Abstract

A pHEMT device processing method has been developed that allows formation of gate and first recess regions using just one lithography step, resulting in self-alignment of the gate to the first recess. Three stage Q-band power amplifiers with small signal gain of 22-24 dB, saturated output power of 32.4 dBm at Vds=5.0 V, and DC yield of 70 % have been produced. At Vds=6 V, the small signal gain and output power are 20-22 dB, and 33.2 dBm, respectively. The process achieves high performance, high yield, reduced complexity, and reduced cost simultaneously.

 

 

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