Transition of High Power SiC MESFETs from 2-inch to 3-inch Production for Improved Cost and Producibility

J.W. Milligan, S.T. Allen, J.J. Sumakeris, A.R. Powell, J.R. Jenny, and J.W. Palmour

Cree, Inc., 4600 Silicon Drive, Durham, NC 27703, (919) 313-5564, jmilligan@cree.com

 

Keywords: SiC, MESFET, HPSI, HTOL

 

Abstract

Significant progress has been made in the development of 3-inch High Purity Semi-insulating (HPSI) 4H-SiC substrates and associated SiC epitaxy. Micropipe densities as low as 4.7 cm -2 have been demonstrated for 3-inch HPSI substrates and SiC epitaxy with excellent intra-wafer sheet resistance uniformity (1.4%) has been demonstrated. SiC MESFETs fabricated on 2-inch wafers to baseline our manufacturing process prior to conversion to 3-inch demonstrated an average power density of 4 W/mm and very tight gate threshold voltage distributions. High temperature operating life (HTOL) testing of these devices has shown only a 2.5% reduction in drain current over the first 1,000 hours of operation. This is well below the JEDec guideline of 20% for defining a failure and is indicative of a robust device and manufacturing process.

 

 

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