High-Yield Silicon Carbide Vertical Junction Field Effect Transistor Manufacturing for RF and Power Applications

 

Victor Veliadis, Li-Shu Chen, Megan McCoy, Eric Stewart, Ty McNutt, Robert Sadler, Alfred Morse, Steve Van Campen, Chris Clarke, Gregory DeSalvo

 

Northrop Grumman Advanced Technology Laboratory, MS 3B10, Linthicum, MD 21090

Email: victor.veliadis@ngc.com, Phone: (410) 765-7037

 

Keywords: VJFET, silicon carbide, ion implanted, power switch

 


Abstract

Silicon Carbide ion-implanted vertical junction field effect transistors have been manufactured for high-frequency and high-power applications. The epitaxial parameters, processing and design are being optimized for high yield manufacturing. Self-aligned processing and high resolution lithography enable vertical sidewalls, sub-micron linewidths and uniform metallizations.  Optimized oxide passivation techniques allow for low leakage currents and sharp onsets of gate-to-source reverse breakdowns. Dielectric layers provide device isolation and reliability. Floating guard-ring widths, spacings and numbers have been optimized for high-voltage blocking at low resistance. The functional yields for high-frequency VJFETs were in the 78-88% range, for an eight wafer lot. The high-power VJFET functional yields were in the 75-85% range for a four wafer lot. The wafers exhibited excellent performance parameter uniformity. High-power VJFETs are capable of blocking 1.6 kV with a relatively low associated specific-on resistance of 2.1 mW cm2 (V2br / Ron,sp = 1.2 GW/cm2). The VJFETs are scaled to increase current output and have been connected in the cascode configuration to form +1200 V blocking, all-SiC, normally-off power switches.

 

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