Process Considerations for Manufacturing 50 μm Thinned III-V Wafers

 

G. Cobb, H. Isom, C. Sellers , V. Williams TriQuint Semiconductor 500 W. Renner Rd. Richardson, TX, 75083 email: hisom@tqs.com

Keywords: 50μm thinned III-V material, backside processing, mount, demount, manufacturability, saw, pick and place

ABSTRACT:

Device performance requirements for heat dissipation continue to drive products to thinner substrate thickness. However, processing of wafers thinned to 50μm creates new challenges for handling these fragile substrates. Breakage of substrates during manufacturing can create significant expense and the risk of damage is increased as the number of steps for backside processing increases.

TriQuint Semiconductor has successfully developed and demonstrated a process for manufacturing devices on 50μm thinned III-V substrates. This paper focuses on the process controls and considerations needed to manufacture devices on thinned substrates. Process considerations at several points in the thin wafer flow (including wafer mounting, backside metallization, demounting and die singulation) will be discussed.

 

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