Kazuki Nomoto, Koichi Hirata, and Mitsuhiro Nakamura
MMIC Development Section, LSI Device Engineering Department, Sony Semiconductor Kyushu Corporation, Kagoshima Technology Center, 5-1, Kokubu Noguchi-kita, Kirishima-shi, Kagoshima, 899-4393 Japan
E-mail: Kazuki.Nomoto@jp.sony.com, Phone: +81-995-47-3739
Keywords: JPHEMT, Power Amplifier, Gain, PAE, Recess Cgd
In this paper, we report a significant gain enhancement of juntion pseudomorphic high electron mobility transistors (JPHEMTs) for wideband code division multiple access (W-CDMA) power amplifiers (PAs). By employing a novel device design characterized by a gate-drain recessed structure, gate gold plating, and optimized device parameters such as doping concentration and barrier layer thickness in the epitaxial structure, a 3.0 dB gain enhancement was achieved with 52% power added efficience (PAE) at a 17.2 dBm output power (Pout), a-40 dBc adjacent channel leakage power rtin (ACPR), and a supply voltage 3.5 V in a 1.95 GHz W-CDMA class-AB operation. This novel device was developed by making changes and improvements toour existing mass production technology, the Microwave Monolithic Integrated Circuit (MMIC) process.