Wu-Sheng Shih1, Jiro Yota2, Hoa Ly2, Ketan Itchhaporia1, and Alex Smith1
1Brewer Science, Inc., 2401 Brewer Drive, Rolla MO 65401, USA email@example.com, (573) 364-0300 2Skyworks Solutions, Inc., 2427 W. Hillcrest Drive, Newbury Park, CA 91320, USA
Keywords: Interlayer Dielectrics, Planarization, polyimide, GaAs HBT
Surface topography and overburden variation are encountered during Gallium Arsenide (GaAs) device manufacturing processes and have a significant impact on device performance and yield. A planarization process, CONTACT® planarization, is presented to locally and globally planarize GaAs heterojunction bipolar transistor (HBT) wafers coated with polyimide material. This planarization process involves physically forcing the flowable material from the raised into the recessed areas to create a planar surface. As a result, the surface topography and overburden variation are significantly reduced, and broader processing latitudes are secured for downstream processes. Consequently, easier process control, more consistent device performance, and higher yield can be achieved.
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