High-Voltage GaN-HEMTs for Power Electronics Applications and Current Collapse Phenomena under High Applied Voltage

Wataru Saito, Ichiro Omura and Kunio Tsuda*

Toshiba Corp. Semiconductor Company and Toshiba Corp. R&D Center* 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8583, Japan Phone: +81-44-549-2603, FAX: +81-44-549-2883, e-mail: wataru3.saito@toshiba.co.jp

Keywords: GaN, High Voltage, Power Electronics

Abstract

Current collapse suppression in 380-V/1.9-A GaN power HEMTs designed for high-voltage power electronics application is reported. The current collapse is caused by the electron trapping by defects in the GaN layer and the interface between the passivation film and the AlGaN layer. Therefore the electric field at the gate edge strongly affects the collapse due to the acceleration of channel electrons. Three types of GaN-HEMTs with different design of the FP structure were fabricated to discuss the relation between the gate-edge electric field and the current collapse. It has been found that the optimized field plate structure minimizes the on-resistance increase caused by the current collapse phenomena. In addition, the on-resistance modulation was increased with the leakage current through the GaN layer. It implies that the accelerated electrons are trapped mainly in the GaN-layer defects. Crystal quality improvement of the GaN layer is also necessary to suppress the current collapse phenomena.

11a.PDF              Return to TOC