Deep Submicron GaN-based Heterostructure Field Effect Transistors with InGaN
Channel and InGaN Back-barrier Designs

Yanqing Deng, Vinod Adivarahan, and Asif Khan
Department of Electrical Engineering, University of South Carolina, 301 Main Street, Columbia, SC 29208,
dengyq@engr.sc.edu, 803-576-6167
Keywords: MOS-DHFET, HFET, 2DEG, InGaN Channel, InGaN Back-barrier, SiON

Abstract
We developed a double-recess etching process and anew Digital-Oxide-Deposition (DOD) technique tofabricate 180nm low-threshold GaN Metal-Oxide-
Semiconductor Double Heterostructure Field EffectTransistors (MOS-DHFET). Two device layer structures,InGaN channel design and InGaN back-barrier design,were employed to improve the confinement of Two-Dimensional Electron Gas (2DEG) and mitigate theshort-channel effects. The devices exhibited high draincurrentsof 1.3 A/mm and delivered RF powers of 3.1W/mm at 26 GHz with a 35 V drain bias. A cutofffrequency of about 65 GHz and a maximum oscillation frequency of 94 GHz have been achieved. The subthreshold swing and the Drain Induced Barrier Lowering (DIBL) in those devices are less than 75 mV/decade and 80 mV/V, respectively. To further improve the confinement of 2DEG, we combined and optimized the InGaN channel design with the InGaN back-barrier design. We also developed a selective doping technique to reduce the high electrical field around the recessed gate and improve the electric field profile in the ungated drift region for supporting high voltage. In addition, the selective doping technique also leads to the reduction of parasitic drain and source resistance in deep-submicron GaN Heterostructure Field Effect Transistors (HFETs) and consequently improves the device RF characteristics.
 
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