Process and Performance Improvements to InGaN/GaN HBTs

Chao-Hsin Wu, Benjamin F. Chu-Kung, and Milton Feng
Department of Electrical and Computer Engineering, University of Illinois
Micro and Nanotechnology Laboratory · 208 N. Wright Street · Urbana, IL 61801
Phone: (217)244-3662, e-mail: cwu27@uiuc.edu
Keywords: HBT, GaN, InGaN, Contact, Ledge
Abstract
InGaN/GaN transistors with different p-type metal stacks have been fabricated and the I-V characteristics have been measured. Devices with Ag and Mg-based metal showed six times improvement of current gain. Additionally, surface damage caused by dry etching was investigated by varying ledge thickness. 14 times improvement of current gain was achieved by implementing a 50A ledge in the transistors.
 
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