Backside Process Considerations for Fabricating Millimeter-Wave

GaN HEMT MMICs

 

Naoya Okamoto, Toshihiro Ohki, Kozo Makiyama, Atsushi Yamada, Satoshi Masuda,

Masahito Kanamura, Yoichi Kamada, Kenji Imanishi, Hisao Shigematsu, Toshihide Kikkawa,

Kazukiyo Joshin, and Naoki Hara

Fujitsu Limited and Fujitsu Laboratories Ltd.

10-1 Morinosato-Wakamiya, Atsugi 243-0197, Japan

E-mail: naoya_okamoto@jp.fujitsu.com, Telephone: +81-46-250-8242

 

Keywords: Backside process, Via-hole, GaN HEMT, Millimeter-wave, MMIC

 

Abstract

We describe a backside process for fabricating millimeter-wave GaN HEMT MMICs having a 0.1-_m length gate covered with a very thin SiN passivation layer, a thin epitaxial layer and airbridges. In particular, we discuss backside process issues regarding thin wafer support, SiC via-hole etching and wafer dicing. Finally, we demonstrate a W-band GaN low-noise amplifier with a record gain of 23 dB at 76.5 GHz and a noise figure of 3.8 dB at 80 GHz.

 

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