Engineered Substrates: alternative technologies using materials integration
Recent developments in the fabrication of transferred layers and porous layers indicate that these technologies may play an important role in the development of high performance electronic and optoelectronic applications. While silicon-on-insulator represents a commercial technology that incorporates materials integration through layer transfer, research in materials integration that are more suited for compound semiconductor applications will be addressed in this preparation.
Two technologies will be presented. First, the transfer of III-V template layers to alternate substrates (silicon, porous silicon, or polycrystalline substrates) and porous silicon layers will be described. Important technological breakthroughs in light ion implantation, low temperature wafer bonding, and low damage, low removal rate chemical mechanical polishing will be highlighted for InP on silicon and porous silicon and GaN.
A second technology is the development of porous semiconductors for subsequent epitaxial growth and device layer transfer. While this technology has been addressed using silicon, there is significantly greater potential in porous III-V materials where high substrate costs or the requirement to transfer device layers to, for example, flexible substrates. The development of porous layers using several different substrates, including germanium, InP, and GaAs, the ability to control the mechanical properties of the porous layers, and ability to transfer layers to different substrates will be presented.
In addition to the key research efforts associated with these structures, an assessment of the costs and competing technologies will be presented.