In0.5Ga0.5P Etch-Stop Process for PHEMT Manufacturing
A U T H O R / C R E D I T S
David Danzilio, Allen Hanson
Integrated Semiconductor Business Unit
100 Chelmsford St.
Lowell, MA 01851
A B S T R A C T
A selective gate recess process for Pseudomorphic HEMTs utilizing In0.5Ga0.5P as the etch-stop layer has been developed. This process employs conventional sulfuric acid etch chemistry to obtain 150:1 GaAs/In0.5Ga0.5P etch selectivity. Due to its small conduction band offset, inclusion of the GaAs/In0.5Ga0.5Player in the epitaxial structure does not increase the ohmic contact or FET source resistances. PHEMTs fabricated with GaAs/In0.5Ga0.5P etch-stop layers show no degradation in critical DC and RF parameters when compared to similar non etch-stop devices.