Investigation of Reliability Failures and Process Improvements to a Source-Via Process
Campbell, Jason Fender, Terry Daly, Keri Costello
Freescale Semiconductor, Compound Semiconductor Fab 1 (CS1)
GaAs devices in our factory employ through wafer via technology. Since the wafers are electrically tested prior to forming the via, construction must be robust. In an effort to reduce wafer costs, a die size reduction was required. During qualification and characterization of die shrink, the via process was investigated. The best method for testing the via is with a reliability test. A failure that was discovered in the via by the reliability test was a metal separation between the frontside and backside layers. This paper discusses the methods to eliminate metal separation in the via. The process improvements include optimized control of the GaAs etch; improved post-etch residue cleans and pre-metal deposition cleans; and increased thickness of the back side seed metal. Finally, new process controls and improved detection methods were used to verify via functionality. Our improved via passed all reliability tests.
Keywords: Through-wafer via, Reliability, Adhesion