Substrate Via Etch Profile Optimization using RIE and Wet Etch Processes


S. E. Roadman, C. Youtsey, C. Sellers, and H. S. Isom


TriQuint Semiconductor,

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Keywords:  RIE, substrate via, selectivity, Ti, pHEMT





     This paper provides a summary of the development of a robust substrate via process using a selective etch.  The parameter space of an RIE etch process was investigated.  It was found that under certain conditions, a via undercut can be observed.  This was an unexpected result.  The epitaxial layers of pHEMT material were found to be particularly sensitive.  Controlled experiments identified a galvanic effect that enhanced lateral etching.  The probability of cavity formation increased when frontside gold metal was exposed due to poor selectivity of the RIE process to the Ti and Pt layers on the frontside interconnect metal.


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