High Frequency Wafer Level Reliability Test Bench with Variable Load Impedance

P. Abele, F. Bourgeois, M. Lanz, J. Grünenpütt, R. Behtash, J. Thorpe and D. Behammer

United Monolithic Semiconductors – GmbH, Wilhelm-Runge-Strasse 11, D-89081 Ulm, Germany Phone: +49-731-505-3093, Fax: +49-731-505-3005, E-mail: abele@ums-ulm.de

Keywords: On Wafer Reliability, GaAs pHEMT, GaN HEMTS, RF Stress


This paper describes an on wafer reliability test set to stress transistors under RF conditions. The setup provides a thermo chuck and a mechanical tuner at the output of the transistor under test. With this configuration, transistor degradation due to the effects of different load lines can be determined. Initial results from tests done on GaAs pHEMTs and GaN HEMTs are presented.


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