Atomic Level InP/Si Wafer-Scale Bonding in Low Temperature

Xuan Xiong Zhanga, b, Tian Chun Yea, Songlin Zhuangb, Jiwei Jiaoc
aInstitute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
bShanghai Key laboratory of Modern Optical System, University of Shanghai for Science and Technology, China
cShanghai Institute of Miscrosystem and Information Technology, Chinese Academy of Sciences
email:, Tel: 86-10-82995590

Keywords: Wafer bonding, Heterogeneous integration, Engineering Substrate, 3D Manufacturing, SOC


We demonstrate atomic level InP/Si wafer-scale bonding after 3000C annealing. The annealing voids at the bonding interface caused usually by plasma exposure are avoided. The pre-patterns to escape the byproducts of bonding reaction are not necessary if the optimal situation of InP/Si wafer bonding is performed.

Paper 13.2.pdf