The Demonstration of Enhancement/Depletion-Mode pHEMT Technology with Optimized E-mode Characteristics for Better Yield

Jhih-Han Du, Fu-Nung Chen, David Wu, Kang-Lin Peng, Jeff Yeh
WIN Semiconductors Corp. No. 69 Technology 7th Rd, Hwaya Technology Park,
Kuei Shan Hsiang, Tao Yuan Shien, Taiwan (333)

Because of the Desktop/Handset wireless communication market keep growing for the passing years, demands of foundry services that can provide low cost, high yield, low-noise amplifier that fully integrated with RF switch or logic control function also growing. WIN semiconductor corp. as the world leading 6-inch GaAs foundry service provider, combing the experience of RF switch process we developed the Enhancement/Depletion-mode pHEMT technology, PD50-01 (Table 1), to match market requirement. The concept of PD50-01 is easy to design in for WIN’s RF switch customers, so we adopt the same EPI structure with internal production switch technology and to result an enhancement-mode device, we need to use metal sinking process. In general metal sinking process itself is a complicated and hard to control one, but we believe it also have the potential to provide a more stable noise performance, Fig 1, for customers naturally, because of gate depletion area is deeper into EPI and far away from surface that may affect the device performance. The other benefit of sinking gate approach is the way of process control can be easily applied on other baseline released D-mode pHEMT technology if customer is looking for an instant integration solution.

To result a very high yield and match customer’s module or system specification, we know the major challenge is from control of E-mode pinch-off voltage. We also know that the variation of E-mode pinch-off voltage is from EPI growth and sinking metal thickness control. For the improvement of EPI growth no matter for within wafer uniformity or run to run consistency, normally means the higher EPI cost. The results we are going to demonstrate are WIN semiconductor corp. find out a way to optimize the metal evaporation process and reduce run to run sinking metal thickness variation or even can compensate EPI growth variation at the same time. The natural of molecular beam epitaxy (MBE) growth EPI will result certain level different D-mode pinch-off voltage within each wafer, according to accumulated data we can see for each single 6-inch wafer, the range of D-mode pinch-off voltage across a wafer is around 0.12V, Fig 2, we expect the E-mode pinch-off voltage should also get similar number, because of this within wafer variation we often see numbers of wafers suffer high yield loss only through the basic 100% DC function test. With the help of process optimization we can reduce the range of E-mode pinch-off voltage across a wafer from 0.11V to 0.08V, Fig 3, and maintain long term (2010 Jan. to Oct.) E-mode pinch-off voltage within a very tight distribution, Fig 4, with 100% DC test average yield over 98%.

Paper 9b.1.pdf