Qualification of Wavice Baseline GaN HEMT process with 0.4 um gate on 4” SiC wafers

Hosang Kwon, Agency for Defense Development
Sangmin Lee, Wavice Inc.
Byoungchul Jun, Wavice Inc.
Chulsoon choi, Wavice Inc.
Hyeyoung Jung, Wavice Inc.
Seokgyu Choi, Wavice Inc.
Min Han, Wavice Inc.
Ho Geun Lee, Wavice Inc.
Myoungkeun Song, Wavice Inc.
Sung Won Lee, Wavice Inc.
Young Jae Kim, Wavice Inc.
Jihun Kwon, Wavice Inc.
Myoungsoo Park, Wavice Inc.
Sewon Hwang, Wavice Inc.
Hangyol Ji, Wavice Inc.

The performance and reliability of AlGaN/AlN/GaN HEMT on 4 inch semi-insulating SiC substrate fabricated with baseline GaN HEMT process of Wavice Inc. have been reported. The baseline process of Wavice Inc. includes AlxGa1-xN/AlN/u-GaN/Fe-GaN epi structure with x=22%, Si+ ion implanted and recess etched ohmic, 0.4 um gate length, Ni based gamma Gate, electro plated void free source connected field plate (SCFP), 5 um thick electro plated interconnect metal, 85 um SiC substrate thickness after grinding, through SiC via directly to the source ohmic metal with sloped side wall, 7 um thick electro plated back side metal. To qualify the process technology, 3 non-consecutive lots were produced. DC/RF characterization and a list of reliability tests have been done on randomly selected devices.

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