The super-lattice power amplifier with diamond enhanced superjunctions (SPADES) is a device that incorporates nanocrystalline diamond superjunctions into the super-lattice castellated field effect transistor (SLCFET), to improve breakdown voltage. A diamond superjunction is formed with p-type nanocrystalline diamond to balance mutual depletion between the two-dimensional electron gas superlattices and the doped diamond in order to reduce the peak electric field in the drain access region. Formation of the diamond superjunction presents several challenges, such as managing diamond conformality, strain, and control over p-type doping. Optimization of diamond growth led to conformal films, with low stress, and linear dependence hole concentration from p-type doping, suitable for the SPADES device.
Fritz Kub
Naval Research Laboratory
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Formation of Diamond Superjunctions to Enable GaN-Based Super-Lattice Power Amplifiers with Diamond Enhanced Superjunctions (SPADES)
Geoffrey Foster, Jacobs Inc., Washington DCTatyana Feygelson, U. S. Naval Research LaboratoryJames Gallagher, ASEE Postdoctoral Fellow Residing at NRLJosephine Chang, Northrop GrummanShamima Afroz, Northrop GrummanKen Nagamatsu, Northrop GrummanRobert Howell, Northrop GrummanFritz Kub, Naval Research LaboratoryDownload Paper -
13.1 High Aspect Ratio Vias in Silicon Carbide Etched by Inductively-Coupled Plasma
Marko Tadjer, U.S. Naval Research LaboratoryLunet Luna, U.S. Naval Research LaboratoryEugene Imhoff, Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryFritz Kub, Naval Research Laboratory -
16.3 Evaluation of GaN Device Structures on 150 mm GaN on Engineered Substrates
Karl D. Hobart, U.S. Naval Research LaboratoryAndrew Koehler, U. S. Naval Research LaboratoryAnindya Nath, George Mason UniversityJennifer Hite, U.S. Naval Research LaboratoryN. Mahadik, U.S. Naval Research LaboratoryFritz Kub, Naval Research LaboratoryOzgur Aktas, QROMIS, USAVladimir Odnoblyudov, QROMIS, USACem Basceri, QROMIS, USA -
18.2 Engineering PECVD SiN Passivation Layers to Enable AlGaN/GaN HEMTs with Low Leakage, Low Current Collapse and High Breakdown Voltage
Andrew Koehler, U. S. Naval Research LaboratoryMarko Tadjer, U.S. Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryFritz Kub, Naval Research Laboratory -
20.5 Characterization of ALD High-k Dielectrics in GaN and Ga2O3 Metal-Oxide-Semiconductor Systems
David Shahin, University of MarylandVirginia Wheeler, U.S. Naval Research LaboratoryMarko Tadjer, U.S. Naval Research LaboratoryLunet Luna, U.S. Naval Research LaboratoryAndrew Koehler, U. S. Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryCharles Eddy, US Naval Research LaboratoryJr., Naval Research LaboratoryFritz Kub, Naval Research LaboratoryAris Christou, University of Maryland-College Park -
5.3 Influence of Substrate Removal on the Electrothermal Characteristics of AlGaN/GaN Membrane High Electron Mobility Transistors
Marko Tadjer, U.S. Naval Research LaboratoryPeter Raad, TMX Scientific and Southern Methodist UniversityTatyana Feygelson, U. S. Naval Research LaboratoryAndrew Koehler, U. S. Naval Research LaboratoryBradford Pate, Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryFritz Kub, Naval Research Laboratory -
11.5 Optimization of AlGaN/GaN HEMT SiN Passivation by Mixed Frequency PECVD
Marko Tadjer, U.S. Naval Research LaboratoryAndrew Koehler, U. S. Naval Research LaboratoryCharles Eddy, US Naval Research LaboratoryJr., Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryFritz Kub, Naval Research Laboratory