Tom Becker

Fraunhofer IISB

  • 6.1.3.2024 SmartSiC™ 150 & 200mm engineered substrate: increasing SiC power device current density up to 30%

    Eric Guiot, SOITEC
    Frédéric Allibert, SOITEC
    Jürgen Leib, Fraunhofer IISB
    Tom Becker, Fraunhofer IISB
    Oleg Rusch, Fraunhofer IISB
    Alexis Drouin, SOITEC
    Walter Schwarzenbach, SOITEC
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