Toshihiko Kosugi

  • Wafer-level Backside Process Technology for Forming High-density VIAs and Backside Metal Patterning for 50-µm-thick InP Substrate

    Takuya Tsutsumi, QSI, Cheon-An, Kyunggi-do, 31044, South Korea
    Toshihiko Kosugi
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