Plasma dicing of silicon wafers is beginning to move from pilot scale into mainstream production. Attention is now focusing on other market sectors which may benefit from a similar dicing approach.  The fragility of GaAs wafers leads to issues (such as wafer breakages, damage to die edges) during conventional wafer saw dicing. Although LASER techniques have been developed, they also have their own drawbacks – specifically sidewall quality.  A systematic investigation of the current capabilities of plasma dicing of GaAs substrates has been performed, developing technology which is both practical and economically viable. Preliminary results show smooth vertical sidewalls of trenches suitable for dicing thinned GaAs substrates at etch rates up to 23μm min^-1.

2A.4 Final.2025

Abstract

Vertical GaN MOSFETs are a promising technology for next generation efficient power systems. Here we investigate the effect of operating temperature on the on-state performance of quasi-vertical GaN MOSFETs, fabricated on SiC substrates. The threshold voltage, transconductance and on-resistance were extracted from measured characteristics across a range of temperatures. Shifts in both threshold voltage and transconductance are attributed to temperature dependent trapping-detrapping at the MOS interface. These are discussed in relation to series resistance contributions in the channel, drift layer and access resistances at the source and drain contacts.