The super-lattice power amplifier with diamond enhanced superjunctions (SPADES) is a device that incorporates nanocrystalline diamond superjunctions into the super-lattice castellated field effect transistor (SLCFET), to improve breakdown voltage. A diamond superjunction is formed with p-type nanocrystalline diamond to balance mutual depletion between the two-dimensional electron gas superlattices and the doped diamond in order to reduce the peak electric field in the drain access region. Formation of the diamond superjunction presents several challenges, such as managing diamond conformality, strain, and control over p-type doping. Optimization of diamond growth led to conformal films, with low stress, and linear dependence hole concentration from p-type doping, suitable for the SPADES device.
Tatyana Feygelson
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Formation of Diamond Superjunctions to Enable GaN-Based Super-Lattice Power Amplifiers with Diamond Enhanced Superjunctions (SPADES)
Geoffrey Foster, Jacobs Inc., Washington DCTatyana Feygelson, U. S. Naval Research LaboratoryJames Gallagher, ASEE Postdoctoral Fellow Residing at NRLJosephine Chang, Northrop GrummanShamima Afroz, Northrop GrummanKen Nagamatsu, Northrop GrummanRobert Howell, Northrop GrummanFritz Kub, Naval Research LaboratoryDownload Paper -
5.3 Influence of Substrate Removal on the Electrothermal Characteristics of AlGaN/GaN Membrane High Electron Mobility Transistors
Download PaperMarko Tadjer, U.S. Naval Research LaboratoryPeter Raad, TMX Scientific and Southern Methodist UniversityTatyana Feygelson, U. S. Naval Research LaboratoryAndrew Koehler, U. S. Naval Research LaboratoryBradford Pate, Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryFritz Kub, Naval Research Laboratory -
10b.4 Reliability Assessment of Thermally-Stable Gate Materials for AlGaN/GaN HEMTs
Download PaperDavid Shahin, University of MarylandJordan Greenlee, NRC Postdoctoral Fellow Residing at the Naval Research LaboratoryAndrew Koehler, U. S. Naval Research LaboratoryVirginia Wheeler, U.S. Naval Research LaboratoryMarko Tadjer, U.S. Naval Research LaboratoryTatyana Feygelson, U. S. Naval Research LaboratoryBradford Pate, Naval Research LaboratoryJennifer Hite, U.S. Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryCharles Eddy, US Naval Research LaboratoryJr., Naval Research LaboratoryFrancis Kub, U.S. Naval Research LaboratoryAris Christou, University of Maryland-College Park -
11.4.2023 Nanocrystalline Diamond-Capped β-(AlxGa1-x)2O3/Ga2O3 Heterostructure FieldEffect Transistor
Hannah N. Masten, National Research Council Postdoctoral Fellow, Residing at NRLJames Spencer Lundh, National Research Council Postdoctoral Fellow, Residing at NRLTatyana Feygelson, U. S. Naval Research LaboratoryJoseph Spencer, U.S. Naval Research LaboratoryTatyana I. Feygelson, American Society for Engineering Education, United States Naval Research Lab. Universidad Politecnica de MadridJennifer K. Hite, Naval Research LaboratoryDaniel Pennachio, U.S. Naval Research Laboratory, Washington DCAlan Jacobs, U.S. Naval Research LaboratoryBoris Feygelson, U.S. Naval Research LaboratoryKohei Sasaki, Novel Crystal TechnologyAkito Kuramata, Novel Crystal Technology, IncPai-Ying Liao, Purdue UniversityPeide D. Ye, Purdue UniversityBradford Pate, Naval Research LaboratoryTravis J. Anderson, U.S. Naval Research LaboratoryMarko J. Tadjer, U.S. Naval Research Laboratory -
10.1.3.2024 3D Diamond Growth for GaN Cooling and TBR Reduction
Daniel Francis, Akash Systems, San Francisco, CA, USASai Charan Vanjari, University of BristolXiaoyang Ji, University of BristolTatyana Feygelson, U. S. Naval Research LaboratoryJoseph Spencer, U.S. Naval Research LaboratoryHannah N. Masten, National Research Council Postdoctoral Fellow, Residing at NRLAlan Jacobs, U.S. Naval Research LaboratoryJames Spencer Lundh, National Research Council Postdoctoral Fellow, Residing at NRLMarko Tadjer, U.S. Naval Research LaboratoryTravis J. Anderson, U.S. Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryBradford Pate, Naval Research LaboratoryJames Pomeroy, University of BristolMatthew Smith, University of BristolMartin Kuball, University of BristolLoading...
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4B.4 – Double-Side Diamond Cooling of GaN HEMTs and Progress Towards Further Reductions in Junction-to-Package Thermal Resistance
James Spencer Lundh, National Research Council Postdoctoral Fellow, Residing at NRLF. Vasquez, University of ConnecticutA. J. Cruz Arzon, University of ConnecticutT.I. Feygelson, U.S. Naval Research Laboratory, Washington DCAlan Jacobs, U.S. Naval Research LaboratoryAndrew Koehler, U. S. Naval Research LaboratoryB.B. Pate, U.S. Naval Research LaboratoryKarl D. Hobart, U.S. Naval Research LaboratoryTravis J. Anderson, U.S. Naval Research LaboratoryM.A. Mastro, U.S. Naval Research LaboratoryG. Pavlidis, University of ConnecticutD. FrancisM.J. Tadjer, U.S. Naval Research LaboratoryAbstract
Herein, we demonstrate top, bottom, and double-side thermal management strategies for gallium nitride (GaN) high electron mobility transistors (HEMTs). The cooling technologies investigated include GaN/SiC (reference), GaN/diamond (bottom-side), diamond/GaN/SiC (top-side), and diamond/GaN/diamond (double-side). We review processing methods to realize these device structures as well as the intricacies of the fabrication process. From DC output characteristics, the diamond/GaN/diamond HEMTs demonstrate over 0.6 A/mm at VGS = 2 V. From a thermal perspective, the double-side diamond cooling approach enabled operation at DC power densities of ~30 W/mm with a peak temperature rise of ~50 K at the drain-side edge of the gate electrode. Finally, we demonstrate our initial efforts towards diamond encasement of AlGaN/GaN epilayers to further reduce device-level thermal resistance.
