Bradford B. Pate

U.S. Naval Research Laboratory

  • Boron-Doped P Nanocrystalline Diamond Gate Electrode for AlGaN-GaN HEMTs

    Marko J. Tadjer, U.S. Naval Research Laboratory
    Tatyana I. Feygelson, American Society for Engineering Education, United States Naval Research Lab. Universidad Politecnica de Madrid
    Jennifer K. Hite, Naval Research Laboratory
    Bradford B. Pate, U.S. Naval Research Laboratory
    Charles R. Eddy, Naval Research Laboratory
    Jr., Naval Research Laboratory
    Francis J. Kub, Naval Research Laboratory
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  • Diamond-coated High Density Vias for Silicon Substrate-side Thermal Management of GaN HEMTs

    Marko J. Tadjer, U.S. Naval Research Laboratory
    Tatyana I. Feygelson, American Society for Engineering Education, United States Naval Research Lab. Universidad Politecnica de Madrid
    Ashu Wang, American Society for Engineering Education, United States Naval Research Lab. Universidad Politecnica de Madrid
    Bradford B. Pate, U.S. Naval Research Laboratory
    Fritz J. Kub, U.S. Naval Research Laboratory
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  • 11.4.2023 Nanocrystalline Diamond-Capped β-(AlxGa1-x)2O3/Ga2O3 Heterostructure FieldEffect Transistor

    Hannah N. Masten, National Research Council Postdoctoral Fellow, Residing at NRL
    James Spencer Lundh, National Research Council Postdoctoral Fellow, Residing at NRL
    Tatyana Feygelson, U. S. Naval Research Laboratory
    Joseph Spencer, U.S. Naval Research Laboratory
    Tatyana I. Feygelson, American Society for Engineering Education, United States Naval Research Lab. Universidad Politecnica de Madrid
    Jennifer K. Hite, Naval Research Laboratory
    Daniel Pennachio, U.S. Naval Research Laboratory, Washington DC
    Alan Jacobs, U.S. Naval Research Laboratory
    Boris Feygelson, U.S. Naval Research Laboratory
    Kohei Sasaki, Novel Crystal Technology
    Akito Kuramata, Novel Crystal Technology, Inc
    Pai-Ying Liao, Purdue University
    Peide D. Ye, Purdue University
    Bradford Pate, Naval Research Laboratory
    Travis J. Anderson, U.S. Naval Research Laboratory
    Marko J. Tadjer, U.S. Naval Research Laboratory

    11.4.2023_Masten- NCD HFET- 2023 CS Mantech – final paper_hnm

  • 10.1.3.2024 3D Diamond Growth for GaN Cooling and TBR Reduction

    Daniel Francis, Akash Systems, San Francisco, CA, USA
    Sai Charan Vanjari, University of Bristol
    Xiaoyang Ji, University of Bristol
    Tatyana Feygelson, U. S. Naval Research Laboratory
    Joseph Spencer, U.S. Naval Research Laboratory
    Hannah N. Masten, National Research Council Postdoctoral Fellow, Residing at NRL
    Alan Jacobs, U.S. Naval Research Laboratory
    James Spencer Lundh, National Research Council Postdoctoral Fellow, Residing at NRL
    Marko Tadjer, U.S. Naval Research Laboratory
    Travis J. Anderson, U.S. Naval Research Laboratory
    Karl D. Hobart, U.S. Naval Research Laboratory
    Bradford Pate, Naval Research Laboratory
    James Pomeroy, University of Bristol
    Matthew Smith, University of Bristol
    Martin Kuball, University of Bristol
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  • 4B.4 – Double-Side Diamond Cooling of GaN HEMTs and Progress Towards Further Reductions in Junction-to-Package Thermal Resistance

    James Spencer Lundh, National Research Council Postdoctoral Fellow, Residing at NRL
    F. Vasquez, University of Connecticut
    A. J. Cruz Arzon, University of Connecticut
    T.I. Feygelson, U.S. Naval Research Laboratory, Washington DC
    Alan Jacobs, U.S. Naval Research Laboratory
    Andrew Koehler, U. S. Naval Research Laboratory
    B.B. Pate, U.S. Naval Research Laboratory
    Karl D. Hobart, U.S. Naval Research Laboratory
    Travis J. Anderson, U.S. Naval Research Laboratory
    M.A. Mastro, U.S. Naval Research Laboratory
    G. Pavlidis, University of Connecticut
    D. Francis
    M.J. Tadjer, U.S. Naval Research Laboratory

    4B.4 Final.2025

    Abstract
    Herein, we demonstrate top, bottom, and double-side thermal management strategies for gallium nitride (GaN) high electron mobility transistors (HEMTs). The cooling technologies investigated include GaN/SiC (reference), GaN/diamond (bottom-side), diamond/GaN/SiC (top-side), and diamond/GaN/diamond (double-side). We review processing methods to realize these device structures as well as the intricacies of the fabrication process. From DC output characteristics, the diamond/GaN/diamond HEMTs demonstrate over 0.6 A/mm at VGS = 2 V. From a thermal perspective, the double-side diamond cooling approach enabled operation at DC power densities of ~30 W/mm with a peak temperature rise of ~50 K at the drain-side edge of the gate electrode. Finally, we demonstrate our initial efforts towards diamond encasement of AlGaN/GaN epilayers to further reduce device-level thermal resistance.